The present invention relates to a semiconductor memory device; and, more particularly, to a semiconductor memory device which performs a negative word line driving.
It is known that a negative word line drive mode refers to a mode that supplies a high voltage VPP to a word line when enabling the word line and a voltage VBBW lower than a ground voltage VSS thereto when disabling the same, in driving it by a word line driving circuit.
The use of the negative word line drive mode increases refresh characteristics and also improves other AC parameters. Especially, the negative voltage VBBW lower than the ground voltage VSS is used as a voltage for disabling the word line, which increases a refresh period due to an extension of information retention time. In addition, the negative word line drive mode is employed because it has several advantages that decrease a VPP burden and improve write recovery time TWR in case of using a low Vcc.
FIG. 1 is a block diagram of a conventional semiconductor memory device which performs a negative word line driving.
As shown in the drawing, the conventional semiconductor memory device includes a block selection address generator 10, a row decoder controller 20, a sub-driver 30, a main word line driver 40 and a sub word line driver 50.
In a brief operation, a block selection address BAX having block information is generated by the block selection address generator 10 by an active signal. The main word line driver 40 is driven by a block selection address BAX-12 to select a main word line MWLB, and the sub-driver 30 is driven by a block selection address BAX0, 1, 2. In response to an output FXB of the sub-driver 30, the sub word line driver 50 is driven to select a sub word line SWL.
The row decoder controller 20 generates a word line off signal WLOFF for disabling a word line. Based on this word line off signal WLOFF, the sub-driver 30 and the main word line driver 40 are controlled. In other words, the word line enabling is done by the block selection address BAX, while the word line disabling is done by the word line off signal WLOFF.
In FIG. 1, arrows towards each of the blocks 20 to 50 imply that each block uses the negative word line drive mode with a voltage VBBW lower than the ground voltage VSS as a power supply voltage of logic low level of the operating voltages of the corresponding block. That is, the voltage VBBW lower than the ground voltage VSS is supplied to the word line when disabling it.
Meanwhile, the refresh property of the semiconductor memory device depends upon the capability of the word line for preservation of data stored in cells. Namely, as the data retention time of cell becomes longer, it may be considered as good products in terms of performance and reliability. To increase the preservation of cell data, therefore, the negative word line drive mode using the voltage VBBW lower than the ground voltage VSS as the word line off voltage has been employed, as stated above.
However, in the semiconductor memory device, an active signal may be inputted every tRRD, and the write or read operation may be repeated while making bank active every clock without disconnection. In this case, the use of the negative word line drive mode may cause a power hungry phenomenon due to current consumption for generation of low voltage VBBW. Herein, tRRD indicates time period from active to active command.
Further, the swing width of signal becomes large from VPP to VBBW, which results in a severe malfunctioning in the refresh and normal operations by noises, rather than increasing the retention time of cell that is the fundamental purpose of the negative word line drive mode. As a result, this has a bad influence on the reliability of the memory device.